张子岳

  预聘助理教授/特别副研究员，硕士生导师

 办公电话：010-68918227

电子邮件：zyzhang@bit.edu.cn

办公地点：4号教学楼125

所在学科

集成电路科学与工程、电子科学与技术

研究方向

三维集成微系统，先进封装，MEMS器件，高密度互连技术

个人简历

2024/07至今：澳门太阳游戏城app，太阳成集团tyc4633，预聘助理教授/特别副研究员

2022/08-2024/07：澳门太阳游戏城app，太阳成集团tyc4633，博士后

2019/01-2020/05：新加坡国立大学，电子与计算机工程系，联合培养博士生

2015/09-2022/03：澳门太阳游戏城app，信息与电子学院/太阳成集团tyc4633，博士

2011/09-2015/06：澳门太阳游戏城app，信息与电子学院，学士

代表性论著

[1] Y. Su, Y. Ding, L. Xiao, Z. Zhang*, et al, “An Ultra-Deep TSV Technique Enabled by the Dual Catalysis-Based Electroless Plating of Combined Barrier and Seed Layers,” Microsystems & Nanoengineering, 2024, 10: 76.

[2] Z. Chen, X. Chen, H. Wang, Z. Cai, M. Xiong, Y. Hao, Y. Ding, and Z. Zhang*, “A Novel Double-Sided Etching and Electroplating Fabrication Scheme for Coaxial Through-Silicon-Vias in 3-D Integration,” IEEE Transactions on Electron Devices, 2024, early access.

[3] B. Yang, Y. Ding, Z. Cheng, A. Ren, L. Xiao, Y. Yan, Z. Zhang*, and Z. Chen*, “Modeling and Characterization of Annealing-Induced Cu Protrusion of TSVs With Polyimide Liner Considering Diffusion Creep Behavior,” IEEE Transactions on Electron Devices, 2023, 70(2): 695-701.

[4] Z. Zhang, Y. Ding, L. Xiao, Z. Cai, B. Yang, Z. Chen, and H. Xie, “Enabling Continuous Cu Seed Layer for Deep Through-Silicon-Vias With High Aspect Ratio by Sequential Sputtering and Electroless Plating,” IEEE Electron Device Letters, 2021, 42(10): 1520-1523.

[5] Z. Zhang, Y. Ding, Z. Chen, Y. Wu, and X. Gong, “A Novel Silicon-Air-Silicon Through-Silicon-Via Structure Realized Using Double-Side Partially Overlapping Etching,” IEEE Electron Device Letters, 2020, 41(10): 1544-1547.

[6] B. Yang, Y. Ding, Y. Hao, H. Wang, Z. Zhang*, and Z. Chen, “Controllable Deposition of Polyimide Insulation Layer by an Engineered Stepped Pre-curing Method in Double-sided TSV Processes,” in 2024 IEEE 7th International Conference on Electronics Technology (ICET), 2024.

[7] Z. Zhang, Z. Chen, B. Yang, Y. Hao, Y. Su, and Y. Ding, “Enabling Low-k Liner in Ultra-high Aspect Ratio TSVs by the Timing of Vacuum Treatment in the Vacuum-assisted Spin-coating Technique,” in 2023 IEEE 24th International Conference on Electronic Packaging Technology (ICEPT), 2023.

[8] Z. Zhang, Y. Ding, L Xiao, Z Cai, B Yang, Z Wu, Y Su, and Z Chen, “Development of Cu Seed Layers in Ultra-High Aspect Ratio Through-Silicon-Vias (TSVs) with Small Diameters,” in 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2021.

[9] Z. Zhang, Y. Ding, B. Yang, A. Ren, and Z. Chen, “A Low-Cost and Low-Temperature Method to Realize Carbon Nanotube Conductor in Through-Silicon-Via,” in 2021 IEEE International 3D Systems Integration Conference (3DIC), 2021.

[10] Z. Zhang, Y. Ding, Z. Chen, M. Zhou, L. Xiao, Z. Cai, M. Xiong, and X. Gong, “Design and Evaluation of a Novel and Ultra-compact Fully-TGV-based Self-shielding Bandpass Filter for 5G Applications,” in 2019 IEEE International 3D Systems Integration Conference (3DIC), 2019.

研究成果

近十年的微纳加工工艺经验，在以TSV为核心的三维垂直互连与异质异构集成技术上取得了一系列研究成果，主持国家自然科学基金青年科学基金项目1项、中国博士后科学基金面上资助1项，作为主要参与人参与国家自然科学基金重大研究计划等10余项科研项目，在IEEE EDL、IEEE TED、MINE等权威期刊和IEEE ECTC、IEEE ICEPT等国际会议发表论文25篇(第一/通讯作者16篇)，已申请6项发明专利。

主持课题

1. 国家自然科学基金委员会，青年科学基金项目，62404019，面向多芯粒集成的低翘曲转接板及无阻挡层通孔TSV双面制备技术研究，2025.01至2027.12，30万元，主持

2. 中国博士后科学基金会，面上资助，2023M730237，碳纳米管TSV 的低成本工艺制备及性能优化研究，2023.07至2024.06，8万元，主持

3. 国家留学基金委，国家建设高水平大学公派留学项目，2019.01至2020.05，10万元，主持

学术兼职

IEEE会员，IEEE TED、Advanced Engineering Materials、ACS Applied Electronic Materials、IEEE Transactions on Circuits and Systems II、Communications engineering、Sensors、Micromachines等期刊审稿人，IEEE ICICM技术委员会委员。